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[linux-dvb] Re: Can someone test this channel please
> > for the SU1378SH frontends. Except one:
> >
> > 11464, V, 4400, 7/8
> >
> > This channel is listed in kingofsat.net, but I just cannot lock onto it.
> > I'm wondering if it actually exists. I'm not interested in the content of
> > it; just why I can't lock on to it.
> >
> > Tuning to lower symbol rate channels takes longer than higher ones... I
> > assume this is normal.
>
> yes, the circuits need a little longer to synchronize...
Ah cool. I don't tend to use low symbol rate channels.
I haven't been able to test this patch with an ALPS BSRU6 tuner, but it should
be fine.
This isn't the final patch; I still have to write the frequency divisor
selection code as suggested by Robert Schlabbach. I'll commit the final
version to CVS myself, once I've had some feedback (assuming its +ve feedback
that is :)
Index: linux/drivers/media/dvb/frontends/stv0299.c
===================================================================
RCS file: /cvs/linuxtv/dvb-kernel/linux/drivers/media/dvb/frontends/stv0299.c,v
retrieving revision 1.21
diff -a -u -b -r1.21 stv0299.c
--- linux/drivers/media/dvb/frontends/stv0299.c 26 Sep 2003 19:56:03 -0000 1.21
+++ linux/drivers/media/dvb/frontends/stv0299.c 25 Oct 2003 22:24:12 -0000
@@ -238,21 +238,47 @@
* set up the downconverter frequency divisor for a
* reference clock comparision frequency of 125 kHz.
*/
-static int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype)
+static int tsa5059_set_tv_freq (struct dvb_i2c_bus *i2c, u32 freq, int ftype, int srate)
{
- u8 addr = (ftype == PHILIPS_SU1278SH) ? 0x60 : 0x61;
- u32 div = freq / 125;
- u8 buf[4] = { (div >> 8) & 0x7f, div & 0xff, 0x84 };
+ u8 addr;
+ u32 div;
+ u8 buf[4];
dprintk ("%s: freq %i, ftype %i\n", __FUNCTION__, freq, ftype);
- if (ftype == PHILIPS_SU1278SH)
- /* activate f_xtal/f_comp signal output */
- /* charge pump current C0/C1 = 00 */
- buf[3] = 0x20;
- else
- buf[3] = freq > 1530000 ? 0xc0 : 0xc4;
+ if ((freq < 950000) || (freq > 2150000)) return -EINVAL;
+
+ // setup frequency divisor
+ div = freq / 1000;
+ buf[0] = (div >> 8) & 0x7f;
+ buf[1] = div & 0xff;
+ buf[2] = 0x81 | ((div & 0x18000) >> 10);
+ buf[3] = 0;
+
+ // tuner-specific settings
+ switch(ftype) {
+ case PHILIPS_SU1278SH:
+ addr = 0x60;
+ buf[3] |= 0x20;
+
+ if (srate < 4000000) buf[3] |= 1;
+
+ if (freq <= 1250000) buf[3] |= 0;
+ else if (freq <= 1550000) buf[3] |= 0x40;
+ else if (freq <= 2050000) buf[3] |= 0x80;
+ else if (freq <= 2150000) buf[3] |= 0xC0;
+ break;
+
+ case ALPS_BSRU6:
+ addr = 0x61;
+ buf[3] |= 0xC0;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ // charge pump
return pll_write (i2c, addr, buf, sizeof(buf));
}
@@ -390,7 +416,7 @@
else if (ftype == PHILIPS_SU1278)
return tua6100_set_tv_freq(i2c, freq, ftype, srate);
else
- return tsa5059_set_tv_freq(i2c, freq, ftype);
+ return tsa5059_set_tv_freq(i2c, freq, ftype, srate);
}
#if 0
@@ -430,9 +456,9 @@
/* AGC1 reference register setup */
if (ftype == PHILIPS_SU1278SH)
- stv0299_writereg (i2c, 0x0f, 0xd2); /* Iagc = Inverse, m1 = 18 */
+ stv0299_writereg (i2c, 0x0f, 0x92); /* Iagc = Inverse, m1 = 18 */
else if (ftype == PHILIPS_SU1278)
- stv0299_writereg (i2c, 0x0f, 0x94); /* Iagc = Inverse, m1 = 18 */
+ stv0299_writereg (i2c, 0x0f, 0x94); /* Iagc = Inverse, m1 = 20 */
else
stv0299_writereg (i2c, 0x0f, 0x52); /* Iagc = Normal, m1 = 18 */
@@ -651,22 +677,40 @@
}
-static int stv0299_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate)
+static int stv0299_set_symbolrate (struct dvb_i2c_bus *i2c, u32 srate, int tuner_type)
{
u32 ratio;
u32 tmp;
- u8 aclk = 0xb4, bclk = 0x51;
+ u8 aclk = 0;
+ u8 bclk = 0;
+ u8 m1;
+
+ if ((srate < 1000000) || (srate > 45000000)) return -EINVAL;
+
+ switch(tuner_type) {
+ case PHILIPS_SU1278SH:
+ aclk = 0xb5;
+ if (srate < 2000000) bclk = 0x86;
+ else if (srate < 5000000) bclk = 0x89;
+ else if (srate < 15000000) bclk = 0x8f;
+ else if (srate < 45000000) bclk = 0x95;
+
+ m1 = 0x14;
+ if (srate < 4000000) m1 = 0x10;
+ break;
- if (srate > M_CLK)
- srate = M_CLK;
- if (srate < 500000)
- srate = 500000;
-
- if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
- if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
- if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
- if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
- if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
+ case ALPS_BSRU6:
+ default:
+ if (srate <= 1500000) { aclk = 0xb7; bclk = 0x87; }
+ else if (srate <= 3000000) { aclk = 0xb7; bclk = 0x8b; }
+ else if (srate <= 7000000) { aclk = 0xb7; bclk = 0x8f; }
+ else if (srate <= 14000000) { aclk = 0xb7; bclk = 0x93; }
+ else if (srate <= 30000000) { aclk = 0xb6; bclk = 0x93; }
+ else if (srate <= 45000000) { aclk = 0xb4; bclk = 0x91; }
+
+ m1 = 0x12;
+ break;
+ }
#define FIN (M_CLK >> 4)
@@ -684,6 +728,7 @@
stv0299_writereg (i2c, 0x1f, (ratio >> 16) & 0xff);
stv0299_writereg (i2c, 0x20, (ratio >> 8) & 0xff);
stv0299_writereg (i2c, 0x21, (ratio ) & 0xf0);
+ stv0299_writereg (i2c, 0x0f, (stv0299_readreg(i2c, 0x0f) & 0xc0) | m1);
return 0;
}
@@ -798,7 +843,7 @@
p->u.qpsk.symbol_rate);
stv0299_set_FEC (i2c, p->u.qpsk.fec_inner);
- stv0299_set_symbolrate (i2c, p->u.qpsk.symbol_rate);
+ stv0299_set_symbolrate (i2c, p->u.qpsk.symbol_rate, tuner_type);
stv0299_writereg (i2c, 0x22, 0x00);
stv0299_writereg (i2c, 0x23, 0x00);
stv0299_readreg (i2c, 0x23);
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