I²C Protocol

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The '''I<sup>2</sup>C''' Bus is often used on [[DVB Cards]] in order to control Tuner ICs and [[Demodulator]]s, thus here a short overview:
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The '''I<sup>2</sup>C''' Bus is often used on [[DVB cards]] in order to control Tuner ICs and [[Demodulator]]s, thus here a short overview:
The '''I<sup>2</sup>C Protocol''' was introduced by Philips as ''Inter-Integrated Circuit Protocol''. It's implemented as a 2-Wire Bus with one or more Masters and up to 127 clients. The two wire signals are called ''SDA'' (Serial Data) and ''SCL'' (Serial Clock). The bus is usually clocked at 100kHz or 400kHz, but slower variants exist as well as fast ones with more than 1MHz clock rate.
The '''I<sup>2</sup>C Protocol''' was introduced by Philips as ''Inter-Integrated Circuit Protocol''. It's implemented as a 2-Wire Bus with one or more Masters and up to 127 clients. The two wire signals are called ''SDA'' (Serial Data) and ''SCL'' (Serial Clock). The bus is usually clocked at 100kHz or 400kHz, but slower variants exist as well as fast ones with more than 1MHz clock rate.

Revision as of 00:02, 16 April 2007

The I2C Bus is often used on DVB cards in order to control Tuner ICs and Demodulators, thus here a short overview:

The I2C Protocol was introduced by Philips as Inter-Integrated Circuit Protocol. It's implemented as a 2-Wire Bus with one or more Masters and up to 127 clients. The two wire signals are called SDA (Serial Data) and SCL (Serial Clock). The bus is usually clocked at 100kHz or 400kHz, but slower variants exist as well as fast ones with more than 1MHz clock rate.

Every I2C message consists of an address byte (7 bit address, 1 bit R/W#) and an arbitrary number of data bytes. The master starts transmission by issuing a START condition, then submitting the address byte to the bus. If any client with this I2C address is listening on the bus it acknowledges this address by pulling the SDA wire low for one clock cycle.

For Write Transfers the master sends all following bytes to the bus and the client acknowledges each byte.

Read Transfers are acknowledged by the Master except the last byte (which does not get acknowledged in order to signal the end of transmission).

It would be nice to have some pictures visualizing the protocol. Any contributors? -- There are some nice diagrams and descriptions of i2c in the BT8x8 and CX2388X datasheets (which Google will usually turn up)

i2c is used mainly by European and Asian STB manufacturers as a communication protocol between the Main Processor, Demodulators and Tuner PLLs.

Since Philips Semiconductor did not release the Protocol to the public, but tries to sell licenses there are some, mostly compatible, variations out there with slight modifications. They are usually called "2-wire Bus", "i2c-compatible Bus".

Alternative (incompatible) Inter-Circuit Interfaces are SPI (faster -- up to several MHz clock rate, but more than 3 signal wires), the simple 8-bit Parallel Microcontroller Bus (fast but more than 8 signals), the 1-wire bus (usually very slow).


Links:

  • [1] Excellent i2c tutorial (including diagrams), and FAQ.
  • The Linux kernel documentation under linux/Documentation/i2c/ is also worth a look.
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