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[linux-dvb] Re: DST & Twinhan-Card
Hello Manu,
here are the other things you asked me about:
> Are you sharing interrupts ?
I don't think so ... Here is my /proc/interrupts :
CPU0
0: 2080099 XT-PIC timer
2: 0 XT-PIC cascade
3: 0 XT-PIC ohci_hcd
5: 6630315 XT-PIC ohci_hcd, saa7146 (0), saa7146 (1)
8: 78720 XT-PIC rtc
9: 0 XT-PIC acpi
10: 358308 XT-PIC bttv0, bt878
12: 29905 XT-PIC ehci_hcd, eth0
14: 24 XT-PIC ide0
15: 13263 XT-PIC ide1
NMI: 0
LOC: 2080100
ERR: 9386
MIS: 0
I also put the card in different slots already.
> What are the values you see when you use *zap ?
video pid 0x0131, audio pid 0x0132
status 1f | signal 3a00 | snr 4c00 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
status 1f | signal 3a00 | snr 0000 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
status 1f | signal 3a00 | snr 4a00 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
status 1f | signal 3a00 | snr 5200 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
status 1f | signal 3a00 | snr 5300 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
status 1f | signal 3b00 | snr 4000 | ber 00000004 | unc 00000000 |
FE_HAS_LOCK
> Load the module with the debug and verbose options.
Here is my dmesg with debug and verbose options :
ACPI: PCI interrupt 0000:00:0a.0[A] -> GSI 10 (level, low) -> IRQ 10
bttv0: Bt878 (rev 17) at 0000:00:0a.0, irq: 10, latency: 32, mmio:
0xcdcfe000
bttv0: detected: Twinhan VisionPlus DVB-T [card=113], PCI subsystem ID
is 1822:0001
bttv0: using: Twinhan DST + clones [card=113,insmod option]
bttv0: risc main @ 1449e000
bttv0: gpio: en=00000000, out=00000000 in=00fb2afe [init]
bttv0: using tuner=4
bttv0: add subdevice "dvb0"
bt878: AUDIO driver version 0.0.0 loaded
bt878: Bt878 AUDIO function found (0).
ACPI: PCI interrupt 0000:00:0a.1[A] -> GSI 10 (level, low) -> IRQ 10
bt878(0): Bt878 (rev 17) at 00:0a.1, irq: 10, latency: 32, memory:
0xcdcff000
DVB: registering new adapter (bttv0).
write_dst writing 0x00 0x06 0x00 0x00 0x00 0x00 0x00 0xfa
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x20
0x44 0x54 0x54 0x44 0x49 0x47 0x20
dst_check_ci: recognize DTTDIG
DST type : terrestial TV
DST type flags :
DVB: registering frontend 2 (DST DVB-T)...
dst_write_tuna: type_flags 0x0
write_dst writing 0x08 0x54 0xd0 0x00 0x08 0x00 0x00 0xcc
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 45
read_dst reply is 0x8
0x54 0x0 0x4b 0x3a 0x0 0x0 0x1f
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x4c 0x3a 0x0 0x0 0x75
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x27 0x3a 0x0 0x0 0x9a
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x3b 0x3a 0x0 0x0 0x86
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
write_dst: write_dst error (err == -5, len == 0x08, b0 == 0x00)
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0xff 0xc3
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0xc 0x39 0x0 0x0 0xb6
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0xe 0x3a 0x0 0x0 0xb3
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x5a 0x3a 0x0 0xff 0x68
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x5 0x3a 0x0 0x0 0xbc
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x9 0x39 0x0 0x0 0xb9
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0xff 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0xff 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0xff 0xc3
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x9 0x3a 0x0 0x0 0xb8
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0x0 0xc1
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0xff 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0xff 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x3a 0x0 0xff 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x5 0x3a 0x0 0x0 0xbc
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0x0 0xc2
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0xff 0xc3
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0xff 0xc3
write_dst writing 0x00 0x05 0x00 0x00 0x00 0x00 0x00 0xfb
read_dst reply is 0xff
dst_wait_dst_ready: dst wait ready after 0
read_dst reply is 0x0
0x5 0x0 0x0 0x39 0x0 0xff 0xc3
Hope that helps
Stefan
> -----Ursprüngliche Nachricht-----
> Von: linux-dvb-bounce@linuxtv.org
> [mailto:linux-dvb-bounce@linuxtv.org] Im Auftrag von Manu Abraham
> Gesendet: Mittwoch, 17. November 2004 07:12
> An: linux-dvb@linuxtv.org
> Betreff: [linux-dvb] Re: DST & Twinhan-Card
>
>
> On Tue November 16 2004 10:59 pm, Stefan Schenk wrote:
> > This might be also of interest for the list
> >
> > I was playing around with the values Jamie was talking about ...
> > without success. There must be some other differences
> between DVB-T in
> > Australia and Germany ....
> >
> > Stefan
> >
> > -----Ursprüngliche Nachricht-----
> > Von: Jamie Honan [mailto:jhonan@optushome.com.au]
> > Gesendet: Sonntag, 14. November 2004 23:38
> > An: Stefan Schenk
> > Betreff: Re: DST & Twinhan-Card
> >
> > On Sun, Nov 14, 2004 at 12:14:37PM +0100, Stefan Schenk wrote:
> > > Hello Jamie,
> > >
> > >
> > > as i saw on the dvb-mailing-list you did a lot of great work,
> > > making the Twinhan-cards working under linux. I have a
> very strange
> > > problem here. I use a DVB-T card from the german company
> HAMA which
> > > is
> > >
> > > said to be a 100% clone of Twinhans VisionDTV. I can load the
> > > drivers and everything looks perfect. The problem is,
> that i get a
> > > very bad signal in (vdr's femon-plugin shows someting between 15%
> > > and 30%) and therefore the picture is very very bad.
> On the Twinhan satellite cards, when the signal is weak, the
> picture is very
> bad.
>
> > > When i start the card with the same antenna in the same
> room under
> > > windows i get a full signal and a perfect picture.
> Are you sharing interrupts ?
>
> > >
> > > Do you have any idee whats wrong with my system or my card ?
> What are the values you see when you use *zap ?
>
> > >
> > > Thanks a lot
> >
> > Hmm. Everything looks good as far as module loading goes.
> Load the module with the debug and verbose options.
>
> >
> > I guess there's a lot more undocumented registers etc.
> Only a couple are known at this time.
>
>
> Manu
> >
> > One thing you could try, the guy who got it going was in Australia,
> > which has 7Mhz bandwidth. You are either 8 or 6. Most apps try
> > BANDWIDTH_AUTO, which I notice sets 7 MHz.
> >
> > You could try playing round with this in the code.
> > I haven't a copy of the latest versions but look for code like this:
> >
> > case BANDWIDTH_6_MHZ:
> > val[6] = 6;
> > break;
> >
> >
> > case BANDWIDTH_7_MHZ:
> > case BANDWIDTH_AUTO:
> > val[6] = 7;
> > break;
> >
> >
> > case BANDWIDTH_8_MHZ:
> > val[6] = 8;
> > break;
> >
> > and try moving BANDWIDTH_AUTO to 8Mhz.
> > (actually I see two spots)
> >
> > You might also try 0 for Auto and see what happens.
> >
> > Let me or the list know.
> > Jamie
>
>
>
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