[vdr] Re: Increasing SDRAM on DVB cards

[Hermann Gausterer <mrq1@gmx.net>]

hi .. good morning

i do not agree here with you, oliver ...
have you access to the same docu like i do? (131 page ..)

> > > > SCS1 ? 0xCC00 0000 - 0xCC1F FFFF
> > > > SCS2 ? 0xCC20 0000 - 0xCDFF FFFF
>
> I guess this is a typo, should read 0xCC20 0000 - 0xCC3FF FFFF

no it is`t; frome Page 19:

SCS1 �¨ 0xCC00 0000 - 0xCC1F FFFF
SCS2 �¨ 0xCC20 0000 - 0xCDFF FFFF

> This is the memory layout of the ARM in PAL mode.
> As Ralph wrote on the other list some time ago, the memory layout in the 
> the datasheet doesn't match the real one.

can be true, but we know not exactly what is it was is 
not correct ...

> At least you can tell that the second chip selects decodes a 2MB range, 
> not a 32MB range.

no ;-) it talks about only 16 mbit chips are working, but decoded
is the whole array

> > but whats new here .. new is that the second array
> > the OSD .. is selected with the, in the meantime "famous"
> > SCS2 line ;-) (page 19 says this)
> Agreed.

you agree with me, that the second array is decoded with
scs2 .. keep that in mind ;-)

> > 32 Mbyte .. and i think that is enough for a true color OSD ;-)
> OSD is limited to 720x576 @ 256 colors (page 41/42).

that was just an truecolor-joke ;-)

> ??? For a decoder you never use the address lines which are fed into the 
> RAM. You need the *upper* address lines!

thats the theory .. but look at page 9; 

SADDR[11:0] 12   O      SDRAM Address bus.

the chip has only 12 pysical adresslines, they are timemultiplexed and
you CANNOT directly attach to them ... i told that allready 5 times now ;-)

and a told you never use adresslines .. but insteed chipselect lines !

> According to the memory map the ARM has an address range 
> >from 0000 0000 .. FFFF FFFF. This corresponds to 32 address lines.

yes :-)

> The RAM gets A0..A11 multiplexed, so you can address the lower 22 
> address bits, not more. 

that is THE CLASSICAL MISTAKE ;-) .. A0-A11 are 12 lines, not 11 :-)

so we have here 24 bit and that is 16M
and i think we get another bit from the 16bit data bus, because
we are always reading LSB=0 and LSB=1 together
which are then 25 bit and 32M .. what a coincidence with the docu ;-)

> > there are ENOUGH adresslines solderd to the chip
> No, see above.

yes ;-)

> > again:
> > the scs2 is allready routed to the osd ram chip ... i hope the
> 
> Don't think so.

why do you think that is not true? klaus told me that there are
two ram chips, every one with 2MB and he want to upgrade one
of them (the OSD one) to 4mb ... the lower bank has only
2 mb, and so the upper bank IS IN USE .. and if it is in use
it is using SCS2 to enable the chip .. this is totaly clear for me!

hermann

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