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[vdr] Re: Increasing SDRAM on DVB cards



Hermann Gausterer wrote:
> hi .. good morning
>
> i do not agree here with you, oliver ...
> have you access to the same docu like i do? (131 page ..)

Yes. At least we agree that we do not agree. :-)

> > > > > SCS1 ? 0xCC00 0000 - 0xCC1F FFFF
> > > > > SCS2 ? 0xCC20 0000 - 0xCDFF FFFF
> >
> > I guess this is a typo, should read 0xCC20 0000 - 0xCC3FF FFFF
>
> no it is`t; frome Page 19:
>
> SCS1  0xCC00 0000 - 0xCC1F FFFF
> SCS2  0xCC20 0000 - 0xCDFF FFFF

It would be really nice if you are right, but nowhere in the AV7110 
datasheet is written that you can connect chips larger than 1Mx16.
Ok, maybe these chips were not available when the AV7110 was designed.

> > This is the memory layout of the ARM in PAL mode.
> > As Ralph wrote on the other list some time ago, the memory layout
> > in the the datasheet doesn't match the real one.
>
> can be true, but we know not exactly what is it was is
> not correct ...
>
> > At least you can tell that the second chip selects decodes a 2MB
> > range, not a 32MB range.
>
> no ;-) it talks about only 16 mbit chips are working, but decoded
> is the whole array

You cannot be sure unless you test it.
You can write a small ARM application, load it and find out which 
addresses assert CS at the SDRAM chip...
I'll do this as soon as my time permits.

> you agree with me, that the second array is decoded with
> scs2 .. keep that in mind ;-)

I never had doubts about this.

> > > 32 Mbyte .. and i think that is enough for a true color OSD ;-)
> >
> > OSD is limited to 720x576 @ 256 colors (page 41/42).
>
> that was just an truecolor-joke ;-)

OK, I missed the smiley.

> > ??? For a decoder you never use the address lines which are fed
> > into the RAM. You need the *upper* address lines!
>
> thats the theory .. but look at page 9;
>
> SADDR[11:0] 12   O      SDRAM Address bus.
>
> the chip has only 12 pysical adresslines, they are timemultiplexed
> and you CANNOT directly attach to them ... i told that allready 5
> times now ;-)

Sigh. I *never* suggested to use these lines for an address decoder.
The multiplexed lines deliver A1..A24. That's not the problem.
To build your *own* decoder you need the upper lines which are 
apparently not available outside of the AV7110: A31..A25.

> and a told you never use adresslines .. but insteed chipselect lines
> !

I simply tried to say that the chip select lines might not be available 
(SCS2), and you cannot create your own chip select because the upper 
address lines are not available (A31..A25).

> > According to the memory map the ARM has an address range
> >
> > >from 0000 0000 .. FFFF FFFF. This corresponds to 32 address lines.
>
> yes :-)
>
> > The RAM gets A0..A11 multiplexed, so you can address the lower 22
> > address bits, not more.
>
> that is THE CLASSICAL MISTAKE ;-) .. A0-A11 are 12 lines, not 11 :-)
              ^^^^^^^^^^^^^^^^^
WRONG, I simply looked at the HY57V161610D datasheet and noticed 
A0..A11. Unfortunately I forgot the BA signal, so we have 12 address 
lines at the RAM chip. So I made a mistake but not the one you think. 
;-)

> so we have here 24 bit and that is 16M
> and i think we get another bit from the 16bit data bus, because
> we are always reading LSB=0 and LSB=1 together
> which are then 25 bit and 32M .. what a coincidence with the docu ;-)
>
> > > there are ENOUGH adresslines solderd to the chip
> >
> > No, see above.
>
> yes ;-)

see above

> > > again:
> > > the scs2 is allready routed to the osd ram chip ... i hope the
> >
> > Don't think so.
>
> why do you think that is not true? klaus told me that there are

Because the SDRAM chip on the board is *probably* connected to SCS1, not 
SCS2! There was absolutely no reason to use SCS2.

> two ram chips, every one with 2MB and he want to upgrade one
> of them (the OSD one) to 4mb ... the lower bank has only
> 2 mb, and so the upper bank IS IN USE .. and if it is in use
> it is using SCS2 to enable the chip .. this is totaly clear for me!

There is nothing like an 'OSD' RAM chip.
There are two RAM chips: the DRAM chip and the SDRAM chip.
We need to enlarge the SDRAM space which is used for decoder buffers 
*and* OSD. SDRAM is probably attached to SCS1.

Oliver



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