The i2c Protocol was introduced by Philips as Inter-Integrated Circuit Protocol. It's implemented as trivial 2-Wire Bus with one or more Masters and up to 127 clients. The two wire signals are called SDA (Serial Data) and SCL (Serial Clock). The bus is usually clocked at 100kHz or 400kHz, but slower variants exist as well as fast ones with more than 1MHz clock rate.
Every i2c message consists of an address byte (7 bit address, 1 bit R/W#) and an arbitrary number of data bytes. The master starts transmission by issuing a START condition, then submitting the address byte to the bus. If any client with this i2c address is listening on the bus he acknowledges this address by pulling the SDA wire low for one clock cycle.
For Write Transfers the master sends all following bytes to the bus and the client acknowledges each byte.
Read Transfers get acknowledged by the Master except the last byte (which does not gets acknowledged in order to signal the end of transmission).
Please add a link to the Philips i2c spec here and it would be nice to have some pictures visualizing the protocol. Any contributors?
Since Philips Semiconductor did not released the Protocol to the public but tries to sell licenses there are some, mostly compatible, variations out there with slight modifications. They are usually called "2-wire Bus", "i2c-compatible Bus" or similar that try to avoid the license fees.
Alternative (incompatible) Inter-Circuit Interfaces are SPI (fast -- up to several MHz clock rate, but more than 3 signal wires), the simple 8-bit Parallel Microcontroller Bus (fast but more than 8 signals), the 1-wire bus (usually very slow).