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[linux-dvb] Re: AVerMedia 771 problems [everything solved]



Wolfram Joost wrote:
> Hi,
>
>> note to self: read also the mailing list archive from 2004-06, not
>> only 2004-05. It works now. I replaced rt352.c with this version:
>> http://www.linuxtv.org/mailinglists/linux-dvb/2004/06-2004/msg00297.html
>
> Can use please find out which difference between the current cvs-version and 
> the version from the mail enables you to use the card?

OK, here is comes. I tried to merge the original version with the
working one. Since I don't know anything about the internals, they may
be stuff in it, I don't need. Besides the needed stuff, I also keept
some cosmetic stuff in, like defining variables only when they needed
in a case or a diff containing only a comment.

The important parts are in set_parameters. One diff is a != instead of
a = and the return value is not EINVAL. The invalid return breaks it,
too. Also a have problems with the sleep. Using the sleep at attach is
ok, but when I fill in FE_SLEEP, the card doesn't wake up anymore.


Dirk

*** mt352.c.orig	Sun Jun 20 10:34:05 2004
--- mt352.c	Sun Jun 20 11:18:24 2004
***************
*** 57,63 ****
  	.type 			= FE_OFDM,
  	.frequency_min 		= 174000000, /* NIM of AV771 starts at 50MHz */
  	.frequency_max 		= 862000000,
! 	.frequency_stepsize 	= 83333,
  /*
  	.frequency_tolerance 	= 0,
  	.symbol_rate_min 	= 1000000,
--- 57,63 ----
  	.type 			= FE_OFDM,
  	.frequency_min 		= 174000000, /* NIM of AV771 starts at 50MHz */
  	.frequency_max 		= 862000000,
! 	.frequency_stepsize 	= 166667,
  /*
  	.frequency_tolerance 	= 0,
  	.symbol_rate_min 	= 1000000,
***************
*** 92,98 ****
  			.flags = I2C_M_RD,
  			.len = 1
  		}
!     };
  	int i;
  
  	for (i = 0; i < 4; i++)
--- 92,98 ----
  			.flags = I2C_M_RD,
  			.len = 1
  		}
! 	};
  	int i;
  
  	for (i = 0; i < 4; i++)
***************
*** 121,128 ****
  	static u8 mt352_agc_cfg [] = { 0x67, 0x19, 0xa0 };
  	static u8 mt352_acq_ctl [] = { 0x53, 0x50 };
  
! 	static u8 mt352_agc_cfg_av771 [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
! 										 0x00, 0xFF, 0x00, 0x40, 0x40 };
  	static u8 mt352_av771_extra[] = { 0xB5, 0x7A };
  	/**
  	 *  We only write non-default settings, all default settings are
--- 121,128 ----
  	static u8 mt352_agc_cfg [] = { 0x67, 0x19, 0xa0 };
  	static u8 mt352_acq_ctl [] = { 0x53, 0x50 };
  
! 	static u8 mt352_agc_cfg_av771 [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, 
! 					     0x00, 0xFF, 0x00, 0x40, 0x40 };
  	static u8 mt352_av771_extra[] = { 0xB5, 0x7A };
  	/**
  	 *  We only write non-default settings, all default settings are
***************
*** 171,192 ****
  
  	switch (op->code_rate_HP) {
  		case FEC_2_3:
! 			tps = (1 << 7);
  			break;
  		case FEC_3_4:
! 			tps = (2 << 7);
  			break;
  		case FEC_5_6:
! 			tps = (3 << 7);
  			break;
  		case FEC_7_8:
! 			tps = (4 << 7);
  			break;
- 		case FEC_1_2:
  		case FEC_AUTO:
  			break;
  		default:
! 			return -EINVAL;
  	}
  
  	switch (op->code_rate_LP) {
--- 171,191 ----
  
  	switch (op->code_rate_HP) {
  		case FEC_2_3:
! 			tps |= (1 << 7);
  			break;
  		case FEC_3_4:
! 			tps |= (2 << 7);
  			break;
  		case FEC_5_6:
! 			tps |= (3 << 7);
  			break;
  		case FEC_7_8:
! 			tps |= (4 << 7);
  			break;
  		case FEC_AUTO:
  			break;
  		default:
! 			;
  	}
  
  	switch (op->code_rate_LP) {
***************
*** 202,218 ****
  		case FEC_7_8:
  			tps |= (4 << 4);
  			break;
- 		case FEC_1_2:
  		case FEC_AUTO:
  			break;
  		default:
! 			return -EINVAL;
  	}
  
  	switch (op->constellation) {
- 		case QPSK:
- 			break;
- 		case QAM_AUTO:
  		case QAM_16:
  			tps |= (1 << 13);
  			break;
--- 201,213 ----
  		case FEC_7_8:
  			tps |= (4 << 4);
  			break;
  		case FEC_AUTO:
  			break;
  		default:
! 			;
  	}
  
  	switch (op->constellation) {
  		case QAM_16:
  			tps |= (1 << 13);
  			break;
***************
*** 220,243 ****
  			tps |= (2 << 13);
  			break;
  		default:
! 			return -EINVAL;
  	}
  
  	switch (op->transmission_mode) {
- 		case TRANSMISSION_MODE_2K:
- 		case TRANSMISSION_MODE_AUTO:
- 			break;
  		case TRANSMISSION_MODE_8K:
  			tps |= (1 << 0);
  			break;
  		default:
! 			return -EINVAL;
  	}
  
  	switch (op->guard_interval) {
- 		case GUARD_INTERVAL_1_32:
- 		case GUARD_INTERVAL_AUTO:
- 			break;
  		case GUARD_INTERVAL_1_16:
  			tps |= (1 << 2);
  			break;
--- 215,232 ----
  			tps |= (2 << 13);
  			break;
  		default:
! 			;
  	}
  
  	switch (op->transmission_mode) {
  		case TRANSMISSION_MODE_8K:
  			tps |= (1 << 0);
  			break;
  		default:
! 			;
  	}
  
  	switch (op->guard_interval) {
  		case GUARD_INTERVAL_1_16:
  			tps |= (1 << 2);
  			break;
***************
*** 248,260 ****
  			tps |= (3 << 2);
  			break;
  		default:
! 			return -EINVAL;
  	}
! 
  	switch (op->hierarchy_information) {
- 		case HIERARCHY_AUTO:
- 		case HIERARCHY_NONE:
- 			break;
  		case HIERARCHY_1:
  			tps |= (1 << 10);
  			break;
--- 237,246 ----
  			tps |= (3 << 2);
  			break;
  		default:
! 			;
  	}
! 	
  	switch (op->hierarchy_information) {
  		case HIERARCHY_1:
  			tps |= (1 << 10);
  			break;
***************
*** 265,271 ****
  			tps |= (3 << 10);
  			break;
  		default:
! 			return -EINVAL;
  	}
  
  
--- 251,257 ----
  			tps |= (3 << 10);
  			break;
  		default:
! 			;
  	}
  
  
***************
*** 274,280 ****
  	buf[1] = msb(tps);      /* TPS_GIVEN_(1|0) */
  	buf[2] = lsb(tps);
  
! 	buf[3] = 0x50;
  
  	/**
  	 *  these settings assume 20.48MHz f_ADC, for other tuners you might
--- 260,267 ----
  	buf[1] = msb(tps);      /* TPS_GIVEN_(1|0) */
  	buf[2] = lsb(tps);
  
! // 	buf[3] = 0xf3;  /* ACQ_CTL, force parameters, automatic spectral inv */
! 	buf[3] = 0x50;  /* ACQ_CTL, fully automatic parameter search */
  
  	/**
  	 *  these settings assume 20.48MHz f_ADC, for other tuners you might
***************
*** 300,314 ****
  
  	/* here we assume 1/6MHz == 166.66kHz stepsize */
  	#define IF_FREQUENCYx6 217    /* 6 * 36.16666666667MHz */
! 	tmp = (3 * freq) / 500 + IF_FREQUENCYx6;
  	buf[9] = msb(tmp);      /* CHAN_START_(1|0) */
  	buf[10] = lsb(tmp);
  
- 	buf[6] = 0x31;  /* INPUT_FREQ_(1|0), 20.48MHz clock, 36.166667MHz IF */
- 	buf[7] = 0x05;  /* see MT352 Design Manual page 32 for details */
- 
  	if (card_type == CARD_AVDVBT771)
  	{
  		if (freq < 150000)
  		{
  			buf[11] = 0xB4;
--- 287,302 ----
  
  	/* here we assume 1/6MHz == 166.66kHz stepsize */
  	#define IF_FREQUENCYx6 217    /* 6 * 36.16666666667MHz */
! 	tmp = (6 * freq) / 1000 + IF_FREQUENCYx6;
  	buf[9] = msb(tmp);      /* CHAN_START_(1|0) */
  	buf[10] = lsb(tmp);
  
  	if (card_type == CARD_AVDVBT771)
  	{
+ 		printk(KERN_DEBUG "setting parameters for 771\n");
+ 		buf[6] = 0xF1;
+ 		buf[7] = 0x06;
+ 
  		if (freq < 150000)
  		{
  			buf[11] = 0xB4;
***************
*** 357,362 ****
--- 345,352 ----
  	}
  	else
  	{
+ 		buf[6] = 0x31;  /* INPUT_FREQ_(1|0), 20.48MHz clock, 36.166667MHz IF */
+ 		buf[7] = 0x05;  /* see MT352 Design Manual page 32 for details */
  
  		printk (KERN_WARNING "buf9,10: %02x %02x\n", buf[9], buf[10]);
  
***************
*** 518,526 ****
  {
  	struct dvb_i2c_bus *i2c = fe->i2c;
  	u32 card_type = (u32) fe->data;
- 	u8 r,snr;
- 	fe_status_t *status;
- 	u16 signal;
  #ifdef FE_GET_TUNE_SETTINGS
  	struct dvb_frontend_tune_settings* fe_tune_settings;
  #endif
--- 508,513 ----
***************
*** 531,572 ****
  		break;
  
  	case FE_READ_STATUS:
! 		status = arg;
  		*status = 0;
! 		r = mt352_read_register (i2c, 0x00);
  		if (r & (1 << 4))
! 			*status = FE_HAS_CARRIER;
  		if (r & (1 << 1))
  			*status |= FE_HAS_VITERBI;
- 		if (r & (1 << 5))
- 			*status |= FE_HAS_LOCK;
  
  		r = mt352_read_register (i2c, 0x01);
  		if (r & (1 << 1))
  			*status |= FE_HAS_SYNC;
! 
  		r = mt352_read_register (i2c, 0x03);
  		if (r & (1 << 6))
  			*status |= FE_HAS_SIGNAL;
  
  		break;
  
  	case FE_READ_BER:
! 		*((u32 *) arg) = (mt352_read_register (i2c, 0x0D) << 16) |
! 		       (mt352_read_register (i2c, 0x0E) << 8) |
! 		       (mt352_read_register (i2c, 0x0F));
  		break;
  
  	case FE_READ_SIGNAL_STRENGTH:
! 		signal = (mt352_read_register (i2c, 0x12) << 8) |
  			     (mt352_read_register (i2c, 0x13));
  		*((u16*) arg) = ~signal;
  		break;
  
  	case FE_READ_SNR:
! 		snr = mt352_read_register (i2c, 0x09);
! 		*((u16*) arg) = (snr << 8) | snr;
  		break;
  
  	case FE_READ_UNCORRECTED_BLOCKS:
  		*(u32*) arg = (mt352_read_register (i2c, 0x10) << 8) |
--- 518,570 ----
  		break;
  
  	case FE_READ_STATUS:
! 	{
! 		u8 r;
! 		fe_status_t *status = arg;
  		*status = 0;
! 
! 		r = mt352_read_register (i2c, 0x0);
! 		if (r & (1 << 5))
! 			*status |= FE_HAS_LOCK;
  		if (r & (1 << 4))
! 			*status |= FE_HAS_CARRIER;
  		if (r & (1 << 1))
  			*status |= FE_HAS_VITERBI;
  
  		r = mt352_read_register (i2c, 0x01);
  		if (r & (1 << 1))
  			*status |= FE_HAS_SYNC;
! 		
  		r = mt352_read_register (i2c, 0x03);
  		if (r & (1 << 6))
  			*status |= FE_HAS_SIGNAL;
  
  		break;
+ 	}
  
  	case FE_READ_BER:
! 	{
! 		u32 *ber = (u32 *) arg;
! 		*ber = (mt352_read_register (i2c, 0xA) << 16) |
! 		       (mt352_read_register (i2c, 0xB) << 8) |
! 		       (mt352_read_register (i2c, 0xC));
  		break;
+ 	}
  
  	case FE_READ_SIGNAL_STRENGTH:
! 	{
! 		u16 signal = (mt352_read_register (i2c, 0x12) << 8) |
  			     (mt352_read_register (i2c, 0x13));
  		*((u16*) arg) = ~signal;
  		break;
+ 	}
  
  	case FE_READ_SNR:
! 	{
! 		u8 snr = mt352_read_register (i2c, 0x9);
! 		*(u16*) arg = (snr << 8) | snr;
  		break;
+ 	}
  
  	case FE_READ_UNCORRECTED_BLOCKS:
  		*(u32*) arg = (mt352_read_register (i2c, 0x10) << 8) |
***************
*** 590,596 ****
  #endif
  
  	case FE_SLEEP:
! 		return mt352_sleep(i2c);
  
  	case FE_INIT:
  		return mt352_init(i2c,card_type);
--- 588,594 ----
  #endif
  
  	case FE_SLEEP:
! 		return 0;
  
  	case FE_INIT:
  		return mt352_init(i2c,card_type);
-- 
As far as we know, our computer has never had an undetected error.

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